Opcode | Instruction | Op/En | 64-bit Mode | Compat/Leg Mode | Description |
---|---|---|---|---|---|
0F 01 CA | CLAC | NP | Valid | Valid | Clear the AC flag in the EFLAGS register. |
Op/En | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
NP | NA | NA | NA | NA |
Clears the AC flag bit in EFLAGS register. This disables any alignment checking of user-mode data accesses. If the SMAP bit is set in the CR4 register, this disallows explicit supervisor-mode data accesses to user-mode pages.
This instruction's operation is the same in non-64-bit modes and 64-bit mode. Attempts to execute CLAC when CPL > 0 cause #UD.
EFLAGS.AC ← 0;
AC cleared. Other flags are unaffected.
#UD |
If the LOCK prefix is used. If the CPL > 0. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. |
#UD |
If the LOCK prefix is used. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. |
#UD | The CLAC instruction is not recognized in virtual-8086 mode. |
#UD |
If the LOCK prefix is used. If the CPL > 0. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. |
#UD |
If the LOCK prefix is used. If the CPL > 0. If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0. |